The present invention relates to a MISFET formed by utilizing a compound semiconductor layer. More particularly, the present invention relates to a MISFET that has a high breakdown voltage and is suitable for use at a large current.
Silicon carbide (SiC) is a semiconductor that has a wider bandgap than that of silicon (Si). Accordingly, SiC has a higher breakdown voltage and a higher melting point compared to Si. In view of these beneficial properties, SiC is a semiconductor material that is expected to be applied to next-generation power electronic devices, RF devices, high-temperature-operating devices and so on. It is also known that SiC can take various crystal structures including cubic ones such as 3C-SiC and hexagonal ones like 6H-SiC and 4H-SiC.
FIG. 12 is a cross-sectional view schematically showing the structure of a known NMOS (Metal Oxide Semiconductor)-FET (Field Effect Transistor) that uses SiC. FIG. 12 shows p-type doped channel SiC layer 102 that has been grown epitaxially on the surface of a p-type SiC substrate 101 doped with aluminum (a p-type impurity) at a concentration of 1xc3x971018 atomsxc2x7cmxe2x88x923; n-type source/drain regions 103a and 103b doped with nitrogen (an n-type impurity) at a concentration of 1xc3x971018 cmxe2x88x923 and formed in the doped channel SiC layer 102; gate insulating film 104 of SiO2 formed on the doped channel SiC layer 102; gate electrode 105 made of an Ni alloy film and formed on the gate insulating film 104; source/drain electrodes 106a and 106b made of an Ni alloy film in ohmic contact with the respective source/drain regions 103a and 103b; and backside electrode 107 made of an Ni alloy film in ohmic contact with the back surface of the SiC substrate 101.
In this structure, if a constant voltage is applied between the source/drain electrodes 106a and 106b, and another voltage (a gate voltage) is applied to the gate electrode 105, a current flowing between the source/drain regions 103a and 103b is modulated in accordance with the gate voltage so that a switching operation is performed. In particular, a MOSFET formed on a SiC substrate has higher breakdown voltage characteristic than those of a MOSFET formed on a Si substrate, and is highly regarded as a power electronic device that can supply a large current as well as expected to be implemented as an RF device.
A power electronic device with a high-speed operation formed on a SiC substrate has been required to further improve in channel mobility and breakdown voltage with respect to its applications. This improvement has been continuously required by all semiconductor industries using compound semiconductor layers such as GaAs, GaN, SiGe, and SiGeC layers as well as a SiC layer for an active region.
In addition, the known MOSFET has problems peculiar to semiconductor devices including compound semiconductor layers. Specifically, a lot of interface states and charges exist at the interface between the gate insulating film 104 and the doped channel SiC layer 102 in the known NMOSFET, thus causing harmful effects on its characteristics as an ideal MOS device. A gate insulating film in a MOSFET formed on a Si substrate is generally made of a SiO2 film (a thermal oxide film), which is formed by thermally oxidizing the Si substrate. For this thermal oxide film, since dangling bonds of Si atoms exist in the surface of the Si substrate, a certain amount of interface states are inevitably generated. It is known that the density of the interface states is about 1010.
On the other hand, it is known that even when the surface of a SiC layer is thermally oxidized to form a SiO2 film (a thermal oxide film), about 1012 interface states or fixed charges still exist at the interface between the SiC layer and the SiO2 film thereon. Hence, the amount of interface states or fixed charges is greater than that in the Si substrate by about two orders of magnitude. It has been considered that this is because carbon, for example, which should have been removed during the thermal oxidation, remains as an impurity in the surface of the SiC layer and because an impurity for carriers (an n-type or a p-type impurity) in the SiC layer to be thermally oxidized is incorporated into the resultant thermal oxide film.
FIG. 13 illustrates an energy band in the gate electrode 105, gate insulating film 104, and doped channel SiC layer 102 when carriers flow, i.e., in an inversion state, in a known NMOSFET. As shown in FIG. 13, in the known NMOSFET, the threshold voltage thereof, for example, varies according to high-density interface states and positive charges trapped as fixed charges. Simultaneously, carriers (electrons) flowing through the channel are affected by interaction with the charges, resulting in decrease in channel mobility and deterioration in characteristics such as transconductance and high frequency response. Likewise, in a PMOSFET, negative charges are trapped in a gate insulating film, resulting in deterioration in characteristics of the device.
In addition to the device using the SiC substrate, devices using a substrate made of a compound semiconductor such as GaAs or GaN also have the same problems. Presumably, one of the reasons is that a compound semiconductor is composed of two or more elements. At the present time, even if an oxide film formed on the surface of a compound semiconductor substrate is used as a gate insulating film, it is difficult for the device to obtain characteristics suitable for practical use. Not only in the MOSFET but as long as an oxynitride film, a nitride film, or other metal oxide film (such as a tantalum oxide film) is used as a gate insulating film, the same problems might occur due to either positive or negative charge trapping.
It is therefore an object of the present invention to ensure a high-speed operation and a high breakdown voltage in a semiconductor device with a MISFET structure provided on a compound semiconductor substrate. It is another object of this invention to provide a semiconductor device exhibiting excellent electronic characteristics by using means for preventing harmful effects on characteristics of a transistor resulting from interface states or fixed charges created between a gate insulating film and a channel region.
An inventive first MISFET includes: a compound semiconductor layer formed on a substrate; two heavily doped layers, which are defined and spaced apart from each other in the compound semiconductor layer and contain an impurity of a first conductivity type; an active region, which is sandwiched between the two heavily doped layers and contains an impurity of a second conductivity type; a gate insulating film formed on the active region; and a gate electrode formed on the gate insulating film. The active region is formed by alternately stacking at least one first semiconductor layer functioning as a region where carriers flow and at least one second semiconductor layer containing an impurity for carriers at a high concentration and smaller in film thickness than the first semiconductor layer such that carriers spread out therein under a quantum effect. A region in the active region that is in contact with the gate insulating film is occupied by the first semiconductor layer.
According to this structure, the impurity concentration is low in the first semiconductor layer. Thus, scattering of impurity ions is reduced in the first semiconductor layer, and an especially high channel mobility is achieved. On the other hand, since the impurity concentration is low in the first semiconductor layer, the number of charges of the second conductivity type, trapped in the gate insulating film or near the interface between the gate insulating film and the active region, decreases and flowing of carriers is less prevented by the charges. When carriers spread out under a quantum effect, charges of the first conductivity type are trapped in an impurity contained in the second semiconductor layer. Thus, flowing of carriers can be compensated for by the charges of the second conductivity type trapped in the gate insulating film or near the interface between the gate insulating film and the active region. Accordingly, it is possible to further increase the channel mobility.
In addition, regardless of high average impurity concentration in the active region, a depletion layer expands throughout the active region and no carrier exists in the active region in the OFF state. Thus, the breakdown voltage is fixed by the first semiconductor layer with a low impurity concentration, and a high breakdown voltage is obtained throughout the active region.
The substrate and the compound semiconductor layer may be formed as a unit, and a trench may be formed by digging in the compound semiconductor layer. In such a case, the gate insulating film and the gate electrode are formed so as to surround the bottom and the side faces of the trench. One of the two heavily doped layers is defined in the uppermost part of the compound semiconductor layer and the other is defined in the lowest part of the compound semiconductor layer. Then, it is possible to obtain a vertical power MISFET that occupies a small area and has the advantages of low current consumption, a low voltage drive and a high gain by utilizing the function of the active region.
A second inventive MISFET includes: a compound semiconductor layer formed on a substrate; a gate insulating film formed on the compound semiconductor layer; two heavily doped layers, which are defined and spaced apart from each other in the compound semiconductor layer and contain an impurity of a first conductivity type; a first active region, which is sandwiched between the two heavily doped layers in the compound semiconductor layer, contains an impurity of a first conductivity type, and functions as a region where carriers flow; and a gate electrode formed on the gate insulating film. The first active region is formed by stacking at least one first semiconductor layer and at least one second semiconductor layer containing an impurity for carriers at a concentration higher than in the first semiconductor layer and smaller in film thickness than the first semiconductor layer such that carriers spread out therein under a quantum effect.
According to this structure, a quantum state resulting from a quantum effect occurs in the second semiconductor layer of the first active region so that the wave function of carriers, which exist locally in the second semiconductor layer, expands to a certain degree. As a result, carriers are distributed not only in the second semiconductor layer but also in the first semiconductor layer. In this state, when potential is enhanced in the active region and carriers expand from the second semiconductor layer to the first semiconductor layer under the quantum effect, carriers are continuously supplied to the first and second semiconductor layers. Since the carriers flow in the first semiconductor layer with a low impurity concentration, scattering of impurity ions are reduced, thus obtaining a high channel mobility. On the other hand, in the OFF state, a depletion layer expands throughout the first active region, and no carrier exists in the first active region. Thus, the breakdown voltage is fixed by the first semiconductor layer having a low impurity concentration, and a high breakdown voltage is obtained throughout the first active region. Accordingly, in a MISFET functioning as an ACCUFET in which a large current flows between first and second heavily doped layers utilizing a first active region of a first conductivity type, a high channel mobility and a high breakdown voltage can be simultaneously achieved.
A region in the first active region that is in contact with the gate insulating film may be occupied by the first semiconductor layer. Then, the impurity concentration is low in the gate insulating film formed by thermally oxidizing the first semiconductor layer, and the number of charges of the second conductivity type trapped in the gate insulating film decreases. Thus, flowing of carriers is less prevented by the charges.
The MISFET may include a second active region, which is formed at least in either a region between the first active region and the gate insulating film or a region facing the gate insulating film with the first active region sandwiched therebetween and contains an impurity of a second conductivity type. Then, the breakdown voltage below the channel can be further increased.
The second active region may be further provided by stacking a plurality of first semiconductor layers and at least one second semiconductor layer containing an impurity for carriers at a concentration higher than in the first semiconductor layers and smaller in film thickness than each of the first semiconductor layers such that carriers spread out therein under a quantum effect. Then, a depletion layer expands throughout the second active region in the OFF state. As a result, the breakdown voltage further increases.
The substrate and the compound semiconductor layer may be formed as a unit. A trench may be formed by digging in the compound semiconductor layer. The gate insulating film and the gate electrode may be formed so as to surround the bottom and the side faces of the trench. One of the two heavily doped layers may be defined in the uppermost part of the compound semiconductor layer and the other may be defined in the lowest part of the compound semiconductor layer. Then, it is possible to obtain a vertical power MISFET that occupies a small area and has the advantages of low current consumption, a low voltage drive and a high gain by utilizing the functions of the first and second active regions.
In the case where the second semiconductor layer is a SiC layer, the thickness of the second semiconductor layer is preferably at least one monolayer and less than 20 nm.
In the case where the first semiconductor layer is a SiC layer, the thickness of the first semiconductor layer is preferably not less than about 10 nm to not more than about 100 nm.